Top 14 points of the PCB Layout checklist
Top 14 points of the PCB Layout checklist
When designing PCB, to make the design of high-frequency circuit boards more reasonable and have better anti-interference performance, the following aspects should be considered:
(1) Reasonably select the number of layers. When wiring high-frequency circuit boards in PCB design, use the middle inner plane as the power and ground layer, which can play a shielding role, effectively reduce parasitic inductance, shorten the length of signal lines, and minimize signal cross-interference between.
(2) Wiring method: The wiring must be turned at a 45° angle or in an arc, which can reduce the emission of high-frequency signals and their coupling.
(3) Trace length: The shorter the trace length, the better, and the shorter the parallel distance between two lines, the better.
(4) Number of via holes: The fewer the number of via holes, the better.
(5) Interlayer wiring direction The interlayer wiring direction should be vertical, that is, the top layer is horizontal and the bottom layer is vertical. This can reduce interference between signals.
(6) Copper coating Adding ground copper coating can reduce interference between signals.
(7) Grounding: Grounding important signal lines can significantly improve the anti-interference ability of the signal. Of course, interference sources can also be grounded so that they cannot interfere with other signals.
(8) Signal lines Signal lines cannot be looped and need to be routed in a daisy chain manner.
Prioritize key signal lines: Analog small signals, high-speed signals, clock signals, synchronization signals and other key signals are routed first Density priority principle: Start wiring from the devices with the most complex connections on the board. Start wiring from the densest area on the board be careful: a. Try to provide dedicated wiring layers for key signals such as clock signals, high-frequency signals, sensitive signals, etc., and ensure the minimum loop area. Methods such as manual priority wiring, shielding, and increasing safety distances should be adopted if necessary. Ensure signal quality. b. The EMC environment between the power layer and the ground layer is poor, so avoid arranging signals sensitive to interference. c. Networks with impedance control requirements should be wired as much as possible according to line length and width requirements.
The clock line is one of the factors that has the greatest impact on EMC. There should be as few holes as possible on the clock line, try to avoid running them in parallel with other signal lines, and stay away from general signal lines to avoid interference with signal lines. At the same time, the power supply part of the board should be avoided to prevent the power supply and clock from interfering with each other. If there is a special clock generation chip on the board, no traces can be routed underneath it. Copper should be laid underneath it, and ground can be specially cut for it if necessary. For crystal oscillators that are referenced by many chips, traces should not be routed under these crystal oscillators, and copper should be laid for isolation.
Right-angle routing is generally a situation that must be avoided in PCB wiring, and has almost become one of the standards for measuring the quality of wiring. So how much impact will right-angle routing have on signal transmission? In principle, right-angle routing will cause the line width of the transmission line to change, causing impedance discontinuity. In fact, not only right-angle wiring, but also round-angle and acute-angle wiring may cause impedance changes. The impact of right-angle wiring on signals is mainly reflected in three aspects: First, the corner can be equivalent to a capacitive load on the transmission line, slowing down the rise time; Second, impedance discontinuity will cause signal reflection; The third is EMI generated by the right-angle tip.
(1) For high-frequency current, when the bend of the wire presents a right angle or even an acute angle, the magnetic flux density and electric field intensity are relatively high near the bend, which will radiate strong electromagnetic waves, and the inductance here The volume will be larger, and the resistance will be larger than obtuse or rounded corners.
(2) For bus wiring of digital circuits, the wiring turns have obtuse or rounded corners, and the wiring area occupies a relatively small area. Under the same line spacing conditions, the total line spacing occupies 0.3 times less width than that of a right-angle turn.
See: Differential Routing and Impedance Matching
a. Strong anti-interference ability, because the coupling between the two differential traces is very good. When there is noise interference from the outside, it is coupled to the two lines almost at the same time, and the receiving end only cares about the difference between the two signals. Therefore, external common mode noise can be completely offset.
b. It can effectively suppress EMI. In the same way, since the polarity of the two signals is opposite, the electromagnetic fields radiated by them can cancel each other out. The closer the coupling, the less electromagnetic energy released to the outside world.
c. Accurate timing positioning. Since the switching change of the differential signal is located at the intersection of the two signals, unlike ordinary single-ended signals that rely on high and low threshold voltages to judge, it is less affected by process and temperature, and can reduce timing errors, and it is also more suitable for circuits with low amplitude signals. The currently popular LVDS (low voltage differential signaling) refers to this small amplitude differential signaling technology.
For PCB engineers, the most important concern is how to ensure that the advantages of differential routing can be fully utilized in actual routing. Perhaps anyone who has been exposed to Layout will understand the general requirements for differential routing, which is “equal length and equal distance”.
The equal length is to ensure that the two differential signals maintain opposite polarity at all times and reduce the common mode component; the equal distance is mainly to ensure that the differential impedance of the two is consistent and reduce reflection. The “principle of getting as close as possible” is sometimes also one of the requirements for differential routing.”
Differential Signal is used more and more widely in high-speed circuit design. The most critical signals in the circuit often adopt differential structure design. Definition: In layman’s terms, it means that the driver end sends two equal and opposite signals. signal, the receiving end determines the logic state “0” or “1” by comparing the difference between these two voltages. The pair of traces that carry differential signals are called differential traces.
Compared with ordinary single-ended signal wiring, the most obvious advantages of differential signals are reflected in the following three aspects: a. Strong anti-interference ability, because the coupling between the two differential traces is very good. When there is noise interference from the outside, it is coupled to the two lines almost at the same time, and the receiving end only cares about the difference between the two signals. Therefore, external common mode noise can be completely offset. b. It can effectively suppress EMI. In the same way, since the polarity of the two signals is opposite, the electromagnetic fields radiated by them can cancel each other out. The closer the coupling, the less electromagnetic energy released to the outside world.
Accurate timing positioning. Since the switching change of the differential signal is located at the intersection of the two signals, unlike ordinary single-ended signals that rely on high and low threshold voltages to judge, it is less affected by process and temperature, and can reduce timing errors, and it is also more suitable for circuits with low amplitude signals. The currently popular LVDS (low voltage differential signaling) refers to this small amplitude differential signaling technology. For PCB engineers, the most important concern is how to ensure that the advantages of differential routing can be fully utilized in actual routing. Perhaps anyone who has been exposed to Layout will understand the general requirements for differential routing, which is “equal length and equal distance”. The equal length is to ensure that the two differential signals maintain opposite polarity at all times and reduce the common mode component; the equal distance is mainly to ensure that the differential impedance of the two is consistent and reduce reflection. The “principle of getting as close as possible” is sometimes also one of the requirements for differential routing.
For PCB engineers, the most important concern is how to ensure that the advantages of differential routing can be fully utilized in actual routing. Perhaps anyone who has been exposed to Layout will understand the general requirements for differential routing, which is “equal length and equal distance”. The equal length is to ensure that the two differential signals maintain opposite polarity at all times and reduce the common mode component; the equal distance is mainly to ensure that the differential impedance of the two is consistent and reduce reflection. The “principle of getting as close as possible” is sometimes also one of the requirements for differential routing.
Snake lines are a type of wiring method often used in Layout. Its main purpose is to adjust the delay and meet the system timing design requirements. Designers must first have this understanding: Snake lines will destroy signal quality and change transmission delays, so they should be avoided when wiring. However, in actual design, in order to ensure that the signal has sufficient holding time, or to reduce the time offset between the same group of signals, the wiring often has to be deliberately wound.
be careful: Differential signal lines that appear in pairs are generally routed in parallel with as few holes as possible. When holes must be drilled, both lines should be drilled together to achieve impedance matching. A group of buses with the same attributes should be routed side by side as much as possible and have the same length as possible. The via holes leading from the patch pad should be as far away from the pad as possible.
Even if the wiring in the entire PCB board is completed well, interference caused by insufficient consideration of power supply and ground wires will degrade the performance of the product and sometimes even affect the success rate of the product. Therefore, the wiring of electricity and ground wires must be taken seriously to minimize the noise interference generated by electricity and ground wires to ensure the quality of the product.
Every engineer who is engaged in the design of electronic products understands the causes of noise between the ground wire and the power line. Now we only describe the reduced noise suppression method:
(1) It is well known that decoupling capacitors are added between the power supply and ground wires. (2) Try to widen the width of the power supply and ground wires. It is best to make the ground wire wider than the power wire. Their relationship is: ground wire>power wire>signal wire. Usually, the signal wire width is: 0.2- 0.07mm, power cord is 1.2~2.5 mm For digital circuit PCBs, wide ground wires can be used to form a loop, that is, to form a ground network (the ground of analog circuits cannot be used in this way) (3) Use a large area of copper layer as a ground wire, and connect all unused areas on the printed board to the ground as a ground wire. Or it can be made into a multi-layer board, with power supply and ground wires occupying one layer each.
For areas with dense via holes, care should be taken to avoid holes connecting to each other in the hollowed-out areas of the power supply and ground layers, forming a division of the plane layer, thereby destroying the integrity of the plane layer, and thereby increasing the loop area of the signal line in the ground layer. .
Ground loop rules:
The minimum loop rule means that the loop area formed by the signal line and its loop should be as small as possible. The smaller the loop area, the less external radiation and the smaller the external interference received.
Device decoupling rules:
A. Add necessary decoupling capacitors to the printed plate to filter out interference signals on the power supply and stabilize the power supply signal. In multi-layer boards, the location of decoupling capacitors is generally not very demanding, but for double-layer boards, the layout of decoupling capacitors and the wiring of the power supply will directly affect the stability of the entire system, and sometimes even affect the design. success or failure. B. In double-layer board design, the current should generally be filtered by the filter capacitor before being used by the device. C. In high-speed circuit design, whether decoupling capacitors can be used correctly is related to the stability of the entire board.
Nowadays, many PCBs are no longer single functional circuits (digital or analog circuits), but are composed of a mixture of digital and analog circuits. Therefore, it is necessary to consider the mutual interference between them when wiring, especially the noise interference on the ground line.
The frequency of digital circuits is high, and the sensitivity of analog circuits is strong. For signal lines, high-frequency signal lines should be as far away from sensitive analog circuit devices as possible. For ground lines, the entire PCB has only one node to the outside world, so The problem of digital and analog common ground must be dealt with inside the PCB. However, the digital ground and analog ground are actually separated inside the board. They are not connected to each other, but are only at the interface where the PCB connects to the outside world (such as plugs, etc.). The digital ground is shorted a little bit to the analog ground, note that there is only one connection point. There are also different ground on the PCB, which is determined by the system design.
When wiring multi-layer printed boards, there are not many unfinished lines left on the signal line layer. Adding more layers will cause waste and increase the workload of production, and the cost will also increase accordingly. To resolve this contradiction, you can consider wiring on the electrical (ground) layer. The power layer should be considered first, followed by the ground layer. Because it is best to preserve the integrity of the formation.
In large-area grounding (electricity), the legs of commonly used components are connected to it. The handling of the connecting legs needs to be comprehensively considered. In terms of electrical performance, it is better for the pads of the component legs to be fully connected to the copper surface, but for There are some hidden dangers in the welding assembly of components, such as: ① Welding requires a high-power heater.
②It is easy to cause virtual solder joints. Therefore, taking into account the electrical performance and process requirements, a cross-shaped solder pad is made, which is called heat shield, commonly known as thermal pad (Thermal). In this way, the possibility of virtual solder joints due to excessive cross-section heat dissipation during welding can be eliminated. Sex is greatly reduced. The treatment of the power (ground) layer legs of multi-layer boards is the same.
In many CAD systems, routing is determined based on the network system. If the grid is too dense, although the number of channels is increased, the steps are too small and the amount of data in the image field is too large. This will inevitably have higher requirements on the storage space of the device, and it will also affect the computing speed of computer electronic products. great impact. Some paths are invalid, such as those occupied by the pads of component legs or occupied by mounting holes and mounting holes. Too sparse mesh and too few channels will have a great impact on the routing rate. Therefore, there must be a grid system with reasonable density to support wiring.
The distance between the legs of a standard component is 0.1 inches (2.54mm), so the basis of the grid system is generally set to 0.1 inches (2.54 mm) or an integral multiple less than 0.1 inches, such as: 0.05 inches, 0.025 inches, 0.02 inches etc.
After the wiring design is completed, it is necessary to carefully check whether the wiring design complies with the rules set by the designer. It is also necessary to confirm whether the rules set meet the needs of the printed board production process. General inspections include the following aspects:
(1) Whether the distance between wires and wires, wires and component pads, wires and through holes, component pads and through holes, and through holes and through holes is reasonable and meets production requirements. (2) Are the widths of the power and ground wires appropriate, and are the power and ground wires tightly coupled (low wave impedance)? Is there any place in the PCB where the ground wire can be widened? (3) Whether the best measures have been taken for key signal lines, such as keeping them to the shortest length, adding protective lines, and clearly separating input lines and output lines. (4) Whether the analog circuit and digital circuit parts have independent ground wires. (5) Whether graphics (such as icons and labels) added to the PCB will cause signal short circuits. (6) Modify some unideal line shapes. (7) Are there process lines added to the PCB? Whether the solder resist meets the requirements of the production process, whether the solder resist size is appropriate, and whether the character mark is pressed on the device pad to avoid affecting the quality of the electrical assembly. (8) Whether the edge of the outer frame of the power supply ground layer in the multilayer board is reduced. If the copper foil of the power supply ground layer is exposed outside the board, it may easily cause a short circuit.
In order to reduce crosstalk between lines, the line spacing should be ensured to be large enough. When the line center spacing is not less than 3 times the line width, 70% of the electric field can be maintained without mutual interference, which is called the 3W rule. If you want to achieve 98% electric field without mutual interference, you can use a spacing of 10W.
(1) The wiring of clock, reset, signals above 100M and some key bus signals and other signal lines must meet the 3W principle. There should be no long parallel lines on the same layer and adjacent layers, and there should be as few vias on the link as possible.
(2) The problem of the number of vias for high-speed signals. Some device instructions generally have strict requirements on the number of vias for high-speed signals. The principle of interconnection is that except for the necessary pin fanout vias, it is strictly prohibited to drill holes in the inner layer. For the extra vias, they laid out 8G PCIE 3.0 traces and drilled 4 vias, and there was no problem.
(3) The center distance between clocks and high-speed signals on the same layer must strictly meet 3H (H is the distance from the wiring layer to the reflow plane); signals on adjacent layers are strictly prohibited from overlapping. It is recommended that the principle of 3H be also met. Regarding the above crosstalk problem, there are tools Can be checked.
Top 200+ PCB Layout Review Checklist
About the checklist of PCB wiring and layout, circuit design, case, electronic components selection, cable&connector, etc.
Number |
| Technical specification content | |
1 | PCB wiring and layout | PCB wiring and layout isolation criteria: strong and weak current isolation, large and small voltage isolation, high and low frequency isolation, input and output isolation, digital analog isolation, input and output isolation, the boundary standard is one order of magnitude difference. Isolation methods include: space separation and ground wire separation. | |
2 | PCB wiring and layout | The crystal oscillator should be as close to the IC as possible, and the wiring should be thicker | |
3 | PCB wiring and layout | Crystal oscillator shell grounding | |
4 | PCB wiring and layout | When the clock wiring is output through the connector, the pins on the connector should be filled with ground pins around the clock line pins | |
5 | PCB wiring and layout | Let the analog and digital circuits have their own power and ground paths respectively. If possible, the power and ground of these two parts of the circuit should be widened as much as possible or separate power and ground layers should be used to reduce the impedance of the power and ground loops and reduce any interference voltage that may be in the power and ground loops | |
6 | PCB wiring and layout | The analog ground and digital ground of the PCB working separately can be connected at a single point near the system grounding point. If the power supply voltage is consistent, the power supply of the analog and digital circuits can be connected at a single point at the power supply entrance. If the power supply voltage is inconsistent, a 1~2nf capacitor is connected near the two power supplies to provide a path for the signal return current between the two power supplies. | |
7 | PCB wiring and layout | If the PCB is inserted into the motherboard, the power supply and ground of the analog and digital circuits of the motherboard should also be separated. The analog ground and digital ground are grounded at the grounding point of the motherboard. The power supply is connected at a single point near the system grounding point. If the power supply voltage is consistent, the power supply of the analog and digital circuits is connected at a single point at the power supply entrance. If the power supply voltage is inconsistent, a 1~2nf capacitor is connected near the two power supplies to provide a path for the signal return current between the two power supplies. | |
8 | PCB wiring and layout | When high-speed, medium-speed and low-speed digital circuits are mixed, they should be assigned different layout areas on the printed circuit board | |
9 | PCB wiring and layout | Low-level analog circuits and digital logic circuits should be separated as much as possible | |
10 | PCB wiring and layout | When designing a multilayer printed circuit board, the power plane should be close to the ground plane and arranged below the ground plane. | |
11 | PCB wiring and layout | When designing a multilayer printed board, the wiring layer should be arranged adjacent to the entire metal plane | |
12 | PCB wiring and layout | When designing a multilayer printed board, separate the digital circuit and the analog circuit, and arrange the digital circuit and the analog circuit in different layers if conditions permit. If they must be arranged on the same floor, the remedy can be achieved by digging trenches, adding grounding lines, and separating them. The analog and digital ground and power supplies must be separated and cannot be mixed. | |
13 | PCB wiring and layout | Clock circuits and high-frequency circuits are the main sources of interference and radiation. They must be arranged separately and away from sensitive circuits. | |
14 | PCB wiring and layout | Pay attention to waveform distortion during long-line transmission | |
15 | PCB wiring and layout | The best way to reduce the loop area of interference sources and sensitive circuits is to use twisted pairs and shielded wires, twisting the signal line and the ground line (or current-carrying loop) together to minimize the distance between the signal and the ground line (or current-carrying loop) | |
16 | PCB wiring and layout | Increase the distance between the lines to minimize the mutual inductance between the interference source and the induced line | |
17 | PCB wiring and layout | If possible, make the interference source line and the induced line at right angles (or close to right angles), which can greatly reduce the coupling between the two lines | |
18 | PCB wiring and layout | Increasing the distance between lines is the best way to reduce capacitive coupling | |
19 | PCB wiring and layout | Before formal wiring, the first point is to classify the lines. The main classification method is based on power level, with each 30dB power level divided into several groups | |
20 | PCB wiring and layout | Wires of different categories should be bundled and laid separately. Wires of adjacent categories can also be grouped together after taking measures such as shielding or twisting. The minimum distance between the classified wiring harnesses is 50~75mm | |
21 | PCB wiring and layout | When laying out resistors, the gain control resistors and bias resistors (pull-ups and pull-downs) of the amplifier, pull-up and pull-down and voltage-stabilizing rectifier circuits should be as close as possible to the amplifier, active devices, their power supplies and ground to reduce their decoupling effects (improve transient response time). | |
22 | PCB wiring and layout | Bypass capacitors are placed close to the power input | |
23 | PCB wiring and layout | Decoupling capacitors are placed at the power input. As close as possible to each IC | |
24 | PCB wiring and layout | Basic characteristics of PCB Impedance: Determined by the quality of copper and cross-sectional area. Specifically: 1 ounce 0.49 milliohms/unit area | |
25 | PCB wiring and layout | Basic principles of PCB wiring: Increase the spacing between traces to reduce crosstalk of capacitive coupling; Lay out power lines and ground lines in parallel to optimize PCB capacitance; Lay out sensitive high-frequency lines away from high-noise power lines; Widen power lines and ground lines to reduce the impedance of power lines and ground lines; | |
26 | PCB wiring and layout | Separation: Use physical separation to reduce coupling between different types of signal lines, especially power and ground lines | |
27 | PCB wiring and layout | Local decoupling: Decouple the local power supply and IC. Use a large-capacity bypass capacitor between the power input port and the PCB to filter the low-frequency pulsation and meet the burst power requirements. Use a decoupling capacitor between the power supply and ground of each IC. These decoupling capacitors should be as close to the pins as possible. | |
28 | PCB wiring and layout | Wiring separation: Minimize the crosstalk and noise coupling between adjacent lines on the same layer of the PCB. Use 3W specification to process key signal paths. | |
29 | PCB wiring and layout | Protection and shunt circuits: Use two-sided ground wire protection measures for key signals, and ensure that both ends of the protection circuit are grounded | |
30 | PCB wiring and layout | Single-layer PCB: The ground line should be at least 1.5mm wide, and the change in the width of the jumper and ground line should be kept to a minimum | |
31 | PCB wiring and layout | Double-layer PCB: Ground grid/dot matrix wiring is preferred, and the width should be kept above 1.5mm. Or put the ground on one side and the signal power on the other side | |
32 | PCB wiring and layout | Protection ring: Use the ground wire to form a ring to enclose the protection logic for isolation | |
33 | PCB wiring and layout | PCB capacitance: PCB capacitance is generated on multilayer boards due to the thin insulation layer between the power surface and the ground. Its advantages are very high frequency response and low series inductance evenly distributed on the entire surface or line. It is equivalent to a decoupling capacitor evenly distributed on the entire board. | |
34 | PCB wiring and layout | High-speed circuits and low-speed circuits: high-speed circuits should be close to the ground plane, and low-speed circuits should be close to the power plane. | |
35 | PCB wiring and layout | The routing directions of adjacent layers are orthogonal structures, avoiding routing different signal lines in the same direction on adjacent layers to reduce unnecessary inter-layer crosstalk; when this situation is difficult to avoid due to board structure limitations (such as some backplanes), especially when the signal rate is high, consider using ground planes to isolate each wiring layer and using ground signal lines to isolate each signal line; | |
36 | PCB wiring and layout | One end of the wiring is not allowed to float in the air to avoid the “antenna effect”. | |
37 | PCB wiring and layout | Impedance matching check rules: The wiring width of the same grid should be consistent. The change of line width will cause uneven characteristic impedance of the line. When the transmission speed is high, reflection will occur. This situation should be avoided in the design. Under certain conditions, it may be impossible to avoid the change of line width, and the effective length of the inconsistent part in the middle should be minimized. | |
38 | PCB wiring and layout | Prevent signal lines from forming self-loops between different layers, which will cause radiation interference. | |
39 | PCB wiring and layout | Short line rule: Keep the wiring as short as possible, especially for important signal lines, such as clock lines, and be sure to place their oscillators very close to the device. | |
40 | PCB wiring and layout | Chamfering rules: PCB design should avoid sharp angles and right angles, which will cause unnecessary radiation and poor process performance. The angle between all lines should be greater than 135 degrees | |
41 | PCB wiring and layout | The wires from the filter capacitor pad to the connection pad should be connected with 0.3mm thick wires, and the interconnection length should be ≤1.27mm. | |
42 | PCB wiring and layout | Generally, the high-frequency part is set at the interface to reduce the wiring length. At the same time, the division of the high/low frequency ground plane should also be considered. Usually, the ground of the two is divided and then connected at a single point at the interface. | |
43 | PCB wiring and layout | For areas with dense vias, care should be taken to avoid connecting the hollowed-out areas of the power supply and ground layers to each other, thereby dividing the plane layer and destroying the integrity of the plane layer, which in turn increases the loop area of the signal line in the ground layer. | |
44 | PCB wiring and layout | The principle of non-overlapping power layer projection: For PCB boards with more than two layers (including), different power layers should avoid overlapping in space, mainly to reduce the interference between different power supplies, especially between power supplies with large voltage differences. The overlapping problem of power planes must be avoided. If it is difficult to avoid, consider using a ground layer in the middle. | |
45 | PCB wiring and layout | 3W rule: To reduce crosstalk between lines, the line spacing should be large enough. When the line center distance is not less than 3 times the line width, 70% of the electric fields can be kept from interfering with each other. If 98% of the electric fields are not interfering with each other, the 10W rule can be used. | |
46 | PCB wiring and layout | 20H rule: Taking one H (the dielectric thickness between the power supply and the ground) as a unit, if the inward contraction is 20H, 70% of the electric field can be confined to the ground edge, and if the inward contraction is 1000H, 98% of the electric field can be confined. | |
47 | PCB wiring and layout | 50-50 rule: the rule for selecting the number of layers of a printed circuit board, that is, if the clock frequency reaches 5MHZ or the pulse rise time is less than 5ns, the PCB board must use a multi-layer board. If a double-layer board is used, it is best to use one side of the printed circuit board as a complete ground plane | |
48 | PCB wiring and layout | Mixed signal PCB partitioning criteria: 1 Partition the PCB into independent analog and digital parts; 2 Place the A/D converter across the partition; 3 Do not split the ground, set a unified ground under the analog and digital parts of the circuit board; 4 In all layers of the circuit board, digital signals can only be routed in the digital part of the circuit board, and analog signals can only be routed in the analog part of the circuit board; 5 Realize the segmentation of analog power supply and digital power supply; 6 The routing cannot cross the gap between the split power supply surfaces; 7 The signal line that must cross the gap between the split power supplies must be located on the wiring layer next to the large area of ground; 8 Analyze the actual path and method of the return ground current; | |
49 | PCB wiring and layout | Multilayer boards are better board-level EMC protection design measures and are recommended. | |
50 | PCB wiring and layout | The signal circuit and the power circuit have their own independent grounding wires, and finally they are grounded at one point. The two should not have a common grounding wire. | |
51 | PCB wiring and layout | The signal return ground wire uses an independent low-impedance grounding loop, and the chassis or structural frame cannot be used as a loop. | |
52 | PCB wiring and layout | When the medium and short wave equipment is connected to the earth, the grounding wire <1/4λ; if the requirement cannot be met, the grounding wire cannot be an odd multiple of 1/4λ. | |
53 | PCB wiring and layout | The ground wires of strong and weak signals should be arranged separately, and each is connected to the ground grid at only one point. | |
54 | PCB wiring and layout | Generally, there should be at least three separate ground wires in the equipment: one is the low-level circuit ground wire (called signal ground wire), one is the relay, motor and high-level circuit ground wire (called interference ground wire or noise ground wire); the other is when the equipment uses AC power, the power supply safety ground wire should be connected to the chassis ground wire, the chassis and the plug box are insulated, but the two are the same at one point, and finally all the ground wires are gathered to one point for grounding. The circuit breaker circuit is single-point grounded at the maximum current point. When f<1MHz, one point is grounded; when f>10MHz, multiple points are grounded; when 1MHz<f<10MHz, if the ground line length is <1/20λ, one point is grounded, otherwise multiple points are grounded. | |
55 | PCB wiring and layout | Guidelines for avoiding ground loops: Power lines should be laid parallel to the ground line. | |
56 | PCB wiring and layout | The heat sink should be connected to the power ground or shielding ground or protection ground in the single board (shielding ground or protection ground is preferred) to reduce radiation interference | |
57 | PCB wiring and layout | Digital ground and analog ground are separated, and the ground line is widened | |
58 | PCB wiring and layout | When mixing high, medium and low speed, pay attention to different layout areas | |
59 | PCB wiring and layout | Specialized zero volt line, power line routing width ≥1mm | |
60 | PCB wiring and layout | The power line and ground line should be as close as possible, and the power and ground on the entire printed circuit board should be distributed in a “well” shape to balance the distribution line current. | |
61 | PCB wiring and layout | Write the interference source line and the sensed line at right angles as much as possible | |
62 | PCB wiring and layout | Classify by power, wires of different categories should be bundled separately, and the distance between separately laid wire bundles should be 50-75mm. | |
63 | PCB wiring and layout | In high-demand situations, the inner conductor should be provided with a complete 360° wrap, and a coaxial connector should be used to ensure the integrity of the electric field shielding | |
64 | PCB wiring and layout | Multilayer board: The power layer and the ground layer should be adjacent. High-speed signals should be placed close to the ground plane, and non-critical signals should be placed close to the power plane. | |
65 | PCB wiring and layout | Power supply: When the circuit requires multiple power supplies, separate each power supply with ground. | |
66 | PCB wiring and layout | Via: When high-speed signals are used, vias generate an inductance of 1-4nH and a capacitance of 0.3-0.8pF. Therefore, the vias of high-speed channels should be as small as possible. Ensure that the number of vias for high-speed parallel lines is consistent. | |
67 | PCB wiring and layout | Stub: Avoid using stub in high-frequency and sensitive signal lines | |
68 | PCB wiring and layout | Star signal arrangement: Avoid using it in high-speed and sensitive signal lines | |
69 | PCB wiring and layout | Radiating signal arrangement: avoid using it for high-speed and sensitive lines, keep the width of the signal path unchanged, and do not make the vias passing through the power plane and the ground too dense. | |
70 | PCB wiring and layout | Ground loop area: Keeping the signal path and its ground return line close together will help minimize the ground loop | |
71 | PCB wiring and layout | Generally, the clock circuit is arranged in the center of the PCB board or a well-grounded position, so that the clock is as close to the microprocessor as possible, and the leads are kept as short as possible, while the quartz crystal oscillator is grounded only to the shell. | |
72 | PCB wiring and layout | To further enhance the reliability of the clock circuit, the clock area can be enclosed and isolated with a ground line, and the grounding area under the crystal oscillator can be increased to avoid laying other signal lines; | |
73 | PCB wiring and layout | The principle of component layout is to divide the analog circuit part from the digital circuit part, divide the high-speed circuit from the low-speed circuit, divide the high-power circuit from the small signal circuit, divide the noise component from the non-noise component, and at the same time try to shorten the leads between the components to minimize the interference coupling between them. | |
74 | PCB wiring and layout | The circuit board is divided into zones according to function, and the ground wires of each zone circuit are connected in parallel and grounded at one point. When there are multiple circuit units on the circuit board, each unit should have an independent ground line return, and each unit should be connected to the common ground at a centralized point. Single-sided and double-sided boards use single-point power supply and single-point grounding. | |
75 | PCB wiring and layout | Important signal lines should be as short and thick as possible, and protective ground should be added on both sides. When the signal needs to be led out, it should be led out through a flat cable, and the “ground line-signal-ground line” should be used in a spaced manner. | |
76 | PCB wiring and layout | I/O interface circuits and power drive circuits should be as close to the edge of the printed board as possible | |
77 | PCB wiring and layout | In addition to the clock circuit, try to avoid routing under noise-sensitive devices and circuits. | |
78 | PCB wiring and layout | When the printed circuit board has high-speed data interfaces such as PCI and ISA, it is necessary to pay attention to the gradual layout of the circuit board according to the signal frequency, that is, starting from the slot interface, the high-frequency circuit, the medium-frequency circuit and the low-frequency circuit are laid out in sequence, so that the circuit that is prone to interference is away from the data interface. | |
79 | PCB wiring and layout | The shorter the signal lead on the printed circuit, the better. The longest should not exceed 25cm, and the number of vias should be as small as possible. | |
80 | PCB wiring and layout | When the signal line needs to turn, use 45-degree or arc fold line wiring, avoid using 90-degree fold line, to reduce the reflection of high-frequency signals. | |
81 | PCB wiring and layout | Avoid 90-degree folds when wiring to reduce high-frequency noise emission | |
82 | PCB wiring and layout | Pay attention to crystal oscillator wiring. Keep the crystal oscillator and the microcontroller pins as close as possible, isolate the clock area with a ground wire, and ground and fix the crystal oscillator shell | |
83 | PCB wiring and layout | Reasonable partitioning of the circuit board, such as strong and weak signals, digital and analog signals. Keep interference sources (such as motors, relays) and sensitive components (such as microcontrollers) as far away as possible | |
84 | PCB wiring and layout | Isolate the digital area from the analog area with the ground wire, separate the digital ground and the analog ground, and finally connect to the power ground at one point. The A/D and D/A chip wiring also follows this principle. The manufacturer has taken this requirement into consideration when allocating the A/D and D/A chip pinouts. | |
85 | PCB wiring and layout | The ground wires of the microcontroller and high-power devices should be grounded separately to reduce mutual interference. High-power devices should be placed on the edge of the circuit board as much as possible. | |
86 | PCB wiring and layout | When wiring, minimize the area of the loop to reduce inductive noise | |
87 | PCB wiring and layout | When wiring, the power line and ground line should be as thick as possible. In addition to reducing the voltage drop, it is more important to reduce the coupling noise. | |
88 | PCB wiring and layout | IC devices should be directly soldered on the circuit board as much as possible, and IC sockets should be used less. | |
89 | PCB wiring and layout | The reference point should generally be set at the intersection of the left and bottom border lines (or the intersection of the extension lines) or the first pad on the plug-in of the printed circuit board. | |
90 | PCB wiring and layout | 25mil grid is recommended for layout | |
91 | PCB wiring and layout | The total connection is as short as possible, and the key signal line is the shortest | |
92 | PCB wiring and layout | Components of the same type should be consistent in the X or Y direction. Polar discrete components of the same type should also strive to be consistent in the X or Y direction for easy production and debugging; | |
93 | PCB wiring and layout | Component placement should be convenient for debugging and maintenance. Small components cannot be placed next to large components. There should be enough space around components that need to be debugged. There should be enough space for heating components to facilitate heat dissipation. Thermistors should be kept away from heating components. | |
94 | PCB wiring and layout | The distance between dual in-line components should be >2mm. The distance between BGA and adjacent components should be >5mm. The distance between small SMD components such as resistors and capacitors should be >0.7mm. The outer side of the SMD component pad and the outer side of the adjacent plug-in component pad should be >2mm. Plug-in components cannot be placed within 5mm around the crimping component. Plug-in components cannot be placed within 5mm around the welding surface. | |
95 | PCB wiring and layout | The decoupling capacitor of the integrated circuit should be as close to the power pin of the chip as possible, with the high frequency closest as the principle. Make the loop between it and the power supply and ground as short as possible. | |
96 | PCB wiring and layout | Bypass capacitors should be evenly distributed around the integrated circuit. | |
97 | PCB wiring and layout | When laying out components, components using the same power supply should be placed together as much as possible., in order to facilitate future power supply division. | |
98 | PCB wiring and layout | The placement of resistors and capacitors for impedance matching purposes should be reasonably arranged according to their properties. | |
99 | PCB wiring and layout | The layout of matching capacitors and resistors should be clearly distinguished. For terminal matching of multiple loads, they must be placed at the farthest end of the signal for matching. | |
100 | PCB wiring and layout | When arranging the matching resistor, it should be close to the driving end of the signal, and the distance is generally not more than 500mil. | |
101 | PCB wiring and layout | Adjust the characters. All characters cannot be placed on the disk. To ensure that the character information can be clearly seen after assembly, all characters should be consistent in the X or Y direction. The size of the characters and silk screen should be uniform. | |
102 | PCB wiring and layout | Key signal lines are prioritized: power supply, analog small signals, high-speed signals, clock signals and synchronization signals are prioritized for wiring; | |
103 | PCB wiring and layout | Loop minimum rule: that is, the loop area formed by the signal line and its loop should be as small as possible. The smaller the loop area, the less external radiation and the less external interference. In the design of double-layer board, when leaving enough space for the power supply, the remaining part should be filled with reference ground, and some necessary vias should be added to effectively connect the double-sided signals. For some key signals, ground isolation should be used as much as possible. For some designs with higher frequencies, other planar signal loops should be specially considered. It is recommended to use multi-layer boards. | |
104 | PCB wiring and layout | Ground lead shortest rule: Try to shorten and thicken the ground lead (especially for high-frequency circuits). For circuits working at different levels, long common ground wires cannot be used. | |
105 | PCB wiring and layout | If the internal circuit is to be connected to the metal casing, single-point grounding should be used to prevent discharge current from flowing through the internal circuit | |
106 | PCB wiring and layout | Components sensitive to electromagnetic interference need to be shielded to isolate them from components or lines that can generate electromagnetic interference. If such lines must pass by components, they should be used at a 90° angle. | |
107 | PCB wiring and layout | The wiring layer should be arranged adjacent to the entire metal plane. This arrangement is to produce flux cancellation effect | |
108 | PCB wiring and layout | Many loops are formed between the grounding points. The diameter of these loops (or the distance between the grounding points) should be less than 1/20 of the highest frequency wavelength | |
109 | PCB wiring and layout | The power line and ground line of a single-sided or double-sided board should be as close as possible. The best way is to lay the power line on one side of the printed board and the ground line on the other side of the printed board, overlapping each other, which will minimize the impedance of the power supply. | |
110 | PCB wiring and layout | Signal routing (especially high-frequency signals) should be as short as possible | |
111 | PCB wiring and layout | The distance between the two conductors must comply with the provisions of the electrical safety design specifications, and the voltage difference must not exceed the breakdown voltage of the air and insulating medium between them, otherwise an arc will occur. In the time from 0.7ns to 10ns, the arc current will reach tens of A, sometimes even more than 100 amperes. The arc will continue until the two conductors touch and short-circuit or the current is too low to maintain the arc. Examples of possible spike arcs include hands or metal objects, so be careful to identify them during design. | |
112 | PCB wiring and layout | Add a ground plane close to the double-sided board and connect the ground plane to the ground point on the circuit at the shortest spacing. | |
113 | PCB Routing and Layout | Ensure that each cable entry point is within 40mm (1.6 inches) of the chassis ground. | |
114 | PCB Routing and Layout | Connect both the connector housing and the metal switch housing to the chassis ground. | |
115 | PCB Routing and Layout | Place a wide conductive guard ring around the membrane keyboard and connect the outer perimeter of the ring to the metal chassis, or at least to the metal chassis at the four corners. Do not connect the guard ring to the PCB ground. | |
116 | PCB wiring and layout | Use multi-layer PCB: Compared with double-sided PCB, ground plane and power plane and closely arranged signal line-ground line spacing can reduce common mode impedance and inductive coupling to 1/10 to 1/100 of double-sided PCB. Try to place each signal layer close to a power layer or ground layer. | |
117 | PCB Routing and Layout | For high-density PCBs with components on both the top and bottom surfaces, very short connections, and many fills, use inner layer traces. Most signal traces and power and ground planes are on inner layers, thus acting like a Faraday cage with shielding. | |
118 | PCB Routing and Layout | Place all connectors on one side of the board whenever possible. | |
119 | PCB wiring and layout | Place wide chassis ground or polygonal fill ground on all PCB layers below the connectors leading out of the chassis (which are easily hit directly by ESD), and connect them together with vias every approximately 13mm. | |
120 | PCB wiring and layout | When assembling the PCB, do not apply any solder to the mounting hole pads on the top or bottom layers. Use screws with built-in washers to achieve close contact between the PCB and the metal chassis/shield or bracket on the ground plane. | |
121 | PCB wiring and layout | Between the chassis ground and circuit ground on each layer, set the same”Isolation zone”; if possible, keep the spacing distance to 0.64mm (0.025 inches). | |
122 | PCB wiring and layout | Set a ring ground around the circuit to prevent ESD interference: 1 Place a ring ground path around the entire circuit board; 2 The width of the ring ground for all layers is >2.5mm (0.1 inch); 3 Use vias to connect the annular ground every 13mm (0.5 inch); 4 Connect the annular ground to the common ground of the multi-layer circuit; 5 For double-sided boards installed in a metal chassis or shielding device, the annular ground should be connected to the common ground of the circuit; 6 For unshielded double-sided circuits, the annular ground is connected to the chassis ground. No solder resist is applied on the annular ground so that the annular ground can act as an ESD discharge rod. At least a 0.5mm wide (0.020 inch) gap is placed somewhere on the annular ground (all layers) to avoid the formation of a large ground loop; 7 If the circuit board will not be placed in a metal chassis or shielding device, solder resist should not be applied on the top and bottom chassis ground wires of the circuit board so that they can act as discharge rods for ESD arcs. | |
123 | PCB wiring and layout | In the area that can be directly hit by ESD, a ground line should be laid near each signal line. | |
124 | PCB wiring and layout | Circuits susceptible to ESD should be placed in the middle of the PCB to reduce the possibility of being touched. | |
125 | PCB wiring and layout | When the length of the signal line is greater than 300mm (12 inches), a ground line must be laid in parallel. | |
126 | PCB wiring and layout | Connection criteria for mounting holes: can be connected to the circuit common ground, or isolated from it. 1When the metal bracket must be used with a metal shielding device or chassis, a 0Ω resistor must be used to achieve the connection. 2. Determine the size of the mounting hole to achieve reliable installation of the metal or plastic bracket. Use large pads on the top and bottom layers of the mounting hole. Do not use solder resist on the bottom pad, and ensure that the bottom pad is not soldered using the wave soldering process. | |
127 | PCB wiring and layout | Protected signal lines and unprotected signal lines are prohibited from being arranged in parallel. | |
128 | PCB wiring and layout | The wiring rules for reset, interrupt and control signal lines: 1. Use high-frequency filtering; 2. Keep away from input and output circuits; 3. Keep away from the edge of the circuit board. | |
129 | PCB wiring and layout | The circuit board in the chassis is not installed in the opening position or internal seam. | |
130 | PCB wiring and layout | The circuit board most sensitive to static electricity is placed in the middle, where it is not easily touched by humans; the device sensitive to static electricity is placed in the middle of the circuit board, where it is not easily touched by humans. | |
131 | PCB wiring and layout | Binding criteria between two metal blocks: 1. Solid bonding tape is better than woven bonding tape; 2. The bonding area is not damp or water-logged; 3. Use multiple conductors to connect the ground planes or ground grids of all circuit boards in the chassis; 4. Make sure the width of the bonding point and gasket is greater than 5mm. | |
132 | Circuit Design | Signal filter leg coupling: For each analog amplifier power supply, a decoupling capacitor must be added between the connection closest to the circuit and the amplifier. For digital integrated circuits, decoupling capacitors are added in groups. Install capacitor bypass on the brushes of motors and generators, connect R-C filters in series on each winding branch, and add low-pass filtering at the power supply entrance to suppress interference. The filter should be installed as close as possible to the device being filtered, and use short, shielded leads as the coupling medium. All filters must be shielded, and the input leads and output leads should be isolated. | |
133 | Circuit design | Each functional board shall specify the requirements for the voltage fluctuation range, ripple, noise, load adjustment rate, etc. of the power supply. The secondary power supply shall meet the above requirements when it reaches the functional board after transmission. | |
134 | Circuit design | The circuit with radiation source characteristics shall be installed in a metal shield to minimize transient interference. | |
135 | Circuit design | Add protection devices at the cable entrance | |
136 | Circuit design | Each IC power pin needs to add bypass capacitors (usually 104) and smoothing capacitors (10uF~100uF) to the ground. The power pins of each corner of the large-area IC also need to add bypass capacitors and smoothing capacitors. | |
137 | Circuit design | Impedance mismatch criteria for filter selection: For low-impedance noise sources, the filter needs to be high-impedance (large series inductance); for high-impedance noise sources, the filter needs to be low-impedance (large parallel capacitance) | |
138 | Circuit design | The capacitor housing, auxiliary lead terminals, positive and negative poles, and circuit boards must be completely isolated | |
139 | Circuit design | The filter connector must be well grounded, and the metal shell filter uses surface grounding. | |
140 | Circuit design | All pins of the filter connector must be filtered | |
141 | Circuit design | In the electromagnetic compatibility design of digital circuits, the bandwidth determined by the rising and falling edges of the digital pulses should be considered instead of the repetition frequency of the digital pulses. The design bandwidth of the printed circuit board of the square digital signal is set to 1/πtr, and the ten times of this bandwidth is usually considered. | |
142 | Circuit design | Use R-S trigger as a buffer between the device control button and the device electronic circuit | |
143 | Circuit design | Reducing the input impedance of sensitive lines effectively reduces the possibility of introducing interference. | |
144 | Circuit Design | LC Filter Between the low output impedance power supply and the high impedance digital circuit, an LC filter is required to ensure the impedance matching of the loop | |
145 | Circuit Design | LC Filter Between the low output impedance power supply and the high impedance digital circuit, an LC filter is required to ensure the impedance matching of the loop | |
145 | Circuit Design | Voltage calibration circuit: Decoupling capacitors (such as 0.1μF) should be added at the input and output ends, and the bypass capacitor selection value follows the standard of 10μF/A. | |
146 | Circuit design | Signal termination: Impedance matching between the source and the destination of a high-frequency circuit is very important. Wrong matching will cause signal feedback and damped oscillation. Excessive RF energy will cause EMI problems. At this time, it is necessary to consider using signal termination. | |
147 | Circuit Design | MCU Circuit: | |
148 | Circuit design | For small-scale integrated circuits with less than 10 outputs, when the operating frequency is ≤50MHZ, at least one 0.1uf filter capacitor should be connected. When the operating frequency is ≥50MHZ, each power pin is equipped with a 0.1uf filter capacitor; | |
149 | Circuit Design | For medium and large-scale integrated circuits, each power pin is equipped with a 0.1uf filter capacitor. For circuits with a large amount of power pin redundancy, the number of capacitors can also be calculated according to the number of output pins, and a 0.1uf filter capacitor is equipped for every 5 outputs. | |
150 | Circuit design | For areas without active devices, at least one 0.1uf filter capacitor is connected for every 6cm2 | |
151 | Circuit design | For ultra-high frequency circuits, each power pin is equipped with a 1000pf filter capacitor. For circuits with large power pin redundancy, the number of matching capacitors can also be calculated according to the number of output pins, with a 1000pf filter capacitor for every 5 outputs | |
152 | Circuit design | High-frequency capacitors should be as close to the power pins of the IC circuit as possible. | |
153 | Circuit design | At least one 0.1uf filter capacitor is connected to every 5 high-frequency filter capacitors; | |
154 | Circuit design | At least two 47uf low-frequency filter capacitors are connected to every 5 10uf; | |
155 | Circuit design | At least one 220uf or 470uf low-frequency filter capacitor should be connected within every 100cm2; | |
156 | Circuit design | At least two 220uf or 470uf capacitors should be configured around each module power outlet. If space permits, the number of capacitors should be appropriately increased; | |
157 | Circuit design | Pulse and transformer isolation criteria: The pulse network and transformer must be isolated. The transformer can only be connected to the decoupling pulse network, and the connecting line is as short as possible. | |
158 | Circuit Design | During the opening and closing process of switches and closers, to prevent arc interference, simple RC networks and inductive networks can be connected, and a high resistance, rectifier or load resistor can be added to these circuits. If this does not work, the input and output leads can be shielded. In addition, through-hole capacitors can be connected to these circuits. | |
159 | Circuit design | The functions of decoupling and filtering capacitors must be analyzed according to the high-frequency equivalent circuit diagram. | |
160 | Circuit design | Appropriate filtering circuits should be used at the power supply introduction of each functional board to filter out differential mode noise and common mode noise as much as possible. The noise discharge ground should be separated from the working ground, especially the signal ground, and the protection ground can be considered; decoupling capacitors should be arranged at the power input end of the integrated circuit to improve the anti-interference ability | |
161 | Circuit design | Clearly define the highest operating frequency of each board, and take necessary shielding measures for devices or components with operating frequencies above 160MHz (or 200 MHz) to reduce their radiation interference level and improve their ability to resist radiation interference | |
162 | Circuit design | If possible, add R-C decoupling at the entrance of the control line (on the printed board) to eliminate possible interference factors during transmission. | |
163 | Circuit design | Use R-S trigger as a buffer between the button and the electronic circuit | |
164 | Circuit design | Use fast recovery diodes in the secondary rectification circuit or connect polyester film capacitors in parallel with the diode | |
165 | Circuit design | “Trimming” transistor switching waveforms | |
166 | Circuit design | Reducing the input impedance of sensitive lines | |
167 | Circuit design | If possible, use balanced lines as input in sensitive circuits, and use the inherent common-mode suppression capability of balanced lines to overcome the interference of interference sources on sensitive lines | |
168 | Circuit design | Directly grounding the load is inappropriate | |
169 | Circuit design | Note that bypass decoupling capacitors (usually 104) should be added between the power supply and ground near the IC | |
170 | Circuit design | If possible, use a balanced line as input for sensitive circuits, and the balanced line is not grounded | |
171 | Circuit design | Add a freewheeling diode to the relay coil to eliminate the back electromotive force interference generated when the coil is disconnected. Adding only a freewheeling diode will delay the disconnection time of the relay. After adding a voltage regulator diode, the relay can operate more times per unit time. | |
172 | Circuit design | Spark suppression circuit (usually RC series circuit, resistance is generally selected from a few K to tens of K, capacitor is selected from 0.01uF) is connected at both ends of the relay contact to reduce the impact of electric sparks. | |
173 | Circuit design | Add a filter circuit to the motor, and make sure the leads of the capacitor and inductor are as short as possible | |
174 | Circuit design | Each IC on the circuit board should be connected in parallel with a 0.01μF~0.1μF high-frequency capacitor to reduce the impact of the IC on the power supply. Pay attention to the wiring of high-frequency capacitors. The connection should be close to the power supply end and as thick and short as possible. Otherwise, it is equivalent to increasing the equivalent series resistance of the capacitor, which will affect the filtering effect. | |
175 | Circuit design | RC suppression circuit is connected at both ends of the thyristor to reduce the noise generated by the thyristor (this noise may break down the thyristor when it is serious) | |
176 | Circuit design | Many microcontrollers are very sensitive to power supply noise. It is necessary to add a filter circuit or a voltage regulator to the microcontroller power supply to reduce the interference of power supply noise on the microcontroller. For example, a π-shaped filter circuit can be formed using magnetic beads and capacitors. Of course, 100Ω resistors can also be used instead of magnetic beads when the conditions are not high. | |
177 | Circuit design | If the I/O port of the microcontroller is used to control noise devices such as motors, isolation should be added between the I/O port and the noise source (add a π-shaped filter circuit). To control noise devices such as motors, isolation should be added between the I/O port and the noise source (add a π-shaped filter circuit). | |
178 | Circuit design | Using anti-interference components such as magnetic beads, magnetic rings, power supply filters, and shielding covers in key places such as microcontroller I/O ports, power lines, and circuit board connection lines can significantly improve the anti-interference performance of the circuit | |
179 | Circuit design | For the idle I/O ports of the microcontroller, do not leave them floating, but connect them to the ground or power supply. The idle terminals of other ICs are connected to ground or power without changing the system logic. | |
180 | Circuit design | Using power monitoring and watchdog circuits for microcontrollers, such as: IMP809, IMP706, IMP813, X25043, X25045, etc., can greatly improve the anti-interference performance of the entire circuit. | |
181 | Circuit design | Under the premise that the speed can meet the requirements, try to reduce the crystal oscillator of the microcontroller and choose a low-speed digital circuit | |
182 | Circuit design | If possible, add RC low-pass filters or EMI suppression components (such as magnetic beads, signal filters, etc.) at the interface of the PCB board to eliminate interference from the connecting wires; but be careful not to affect the transmission of useful signals | |
183 | Circuit design | When wiring the clock output, do not use direct serial connection to multiple components (called daisy-chain connection); instead, provide clock signals directly to multiple other components through the buffer | |
184 | Circuit Design | Extend the membrane keyboard border to 12mm beyond the metal line, or use plastic cutouts to increase the path length. | |
185 | Circuit Design | Close to the connector, connect the signal on the connector to the chassis ground of the connector using an L-C or bead-capacitor filter. | |
186 | Circuit Design | Add a magnetic bead between the chassis ground and the circuit common ground. | |
187 | Circuit Design | The power distribution system inside the electronic equipment is the main object of ESD arc inductive coupling. The anti-ESD measures for the power distribution system are: 1 Twist the power line and the corresponding return line tightly together; 2 Place a magnetic bead at the place where each power line enters the electronic equipment; 3 Place a transient current suppressor, metal oxide varistor (MOV) or 1kV high-frequency capacitor between each power pin and the chassis ground of the electronic equipment; 4 It is best to arrange a dedicated power and ground plane on the PCB, or a tight power and ground grid, and use a large number of bypass and decoupling capacitors. | |
188 | Circuit Design | Place resistors and magnetic beads in series at the receiving end. For cable drivers that are easily hit by ESD, you can also place resistors or magnetic beads in series at the driving end. | |
189 | Circuit Design | Place a transient protector at the receiving end. 1 Use short and thick wires (less than 5 times the width, preferably less than 3 times the width) to connect to the chassis ground. 2 The signal and ground wires coming out of the connector should be directly connected to the transient protector before connecting to other parts of the circuit. | |
190 | Circuit Design | Place filter capacitors at the connector or within 25mm (1.0 inches) of the receiving circuit. 1 Use short and thick wires to connect to the chassis ground or the receiving circuit ground (less than 5 times the width, preferably less than 3 times the width). 2 The signal and ground wires should be connected to the capacitors first and then to the receiving circuit. | |
191 | Casing | On a metal chassis, the maximum opening diameter is ≤λ/20, where λ is the wavelength of the highest frequency electromagnetic wave inside and outside the machine; non-metallic chassis are considered to be unprotected in terms of electromagnetic compatibility design. | |
192 | Case | The shield has the least number of seams; at the seams of the shield, the multi-point spring pressure contact method has good electrical continuity; the ventilation hole D<3mm, this aperture can effectively prevent large electromagnetic leakage or entry; the shield opening (such as the ventilation hole) is blocked with a fine copper mesh or other appropriate conductive materials; if the metal mesh of the ventilation hole needs to be removed frequently, it can be fixed around the hole with screws or bolts, but the screw spacing is <25mm to maintain continuous line contact | |
193 | Case | f>1MHz, any metal plate shield with a thickness of 0.5mm will reduce the field strength by 99%; when f>10MHz, 0.1mm copper shield will reduce the field strength by more than 99%; f>100MHz, the copper or silver layer on the surface of the insulator is a good shield. But it should be noted that for plastic shells, when the metal coating is sprayed inside, the domestic spraying process is not up to standard, the continuous conduction effect between the coating particles is not good, and the conduction impedance is large. The negative effects of the spraying failure should be taken seriously. | |
194 | Case | The ground connection of the whole machine is not coated with insulating paint. It is necessary to ensure reliable metal contact with the ground cable to avoid the wrong way of relying solely on screw threads for ground connection | |
195 | Case | Establish a perfect shielding structure, with a grounded metal shielding shell that can release the discharge current to the ground | |
196 | Case | Establish an ESD-resistant environment with a breakdown voltage of 20kV; measures to protect by increasing distance are effective. | |
197 | Case | Any user-operator accessible point including seams, vents, and mounting holes, accessible ungrounded metal such as fasteners, switches, levers, and indicators with a path length greater than 20 mm between the electronic device and the following: | |
198 | Case | Use mylar tape to cover seams and mounting holes inside the chassis. This extends the edges of the seams/vias and increases path length. | |
199 | Case | Use metal caps or shielded plastic dust covers to cover unused or rarely used connectors. | |
200 | Case | Use switches and joysticks with plastic shafts, or put plastic handles/covers on them to increase path length. Avoid handles with metal set screws. | |
201 | Case | Mount LEDs and other indicators in holes in equipment and cover them with tape or covers to extend the edges of the holes or use conduit to increase path length. | |
202 | Case | Round the edges and corners of metal parts that place heat sinks near chassis seams, vents, or mounting holes. | |
203 | Case | In plastic cases, metal fasteners near electronic equipment or ungrounded should not protrude from the case. | |
204 | Case | High feet to keep the device off the table or floor can solve the problem of indirect ESD coupling from the table/floor or horizontal coupling surface. | |
205 | Case | Apply adhesive or sealant around the membrane keyboard circuit layer. | |
206 | Case | Case joint and edge protection guidelines: Joints and edges are critical. At the joints of the chassis body, high-pressure silicone or gaskets should be used to achieve sealing, ESD protection, water and dust resistance. | |
207 | Chassis | Ungrounded chassis should have a breakdown voltage of at least 20kV (rules A1 to A9); for grounded chassis, electronic equipment must have a breakdown voltage of at least 1500V to prevent secondary arcing, and the path length must be greater than or equal to 2.2mm. | |
208 | Enclosure | Enclosure is made of the following shielding materials: sheet metal; polyester film/copper or polyester film/aluminum laminate; thermoformed metal mesh with welded joints; thermoformed metallized fiber mat (non-woven) or fabric (woven); silver, copper or nickel coating; zinc arc spraying; vacuum metallization; electroless plating; conductive filler material added to plastic; | |
209 | Enclosure | Shielding material anti-electrochemical corrosion criteria: The potential between the parts in contact with each other (EMF) <0.75V. If in a salty and humid environment, the potential between each other must be <0.25V. The size of the anode (positive) part should be larger than the cathode (negative) part. | |
210 | Case | Use shielding material with more than 5 times the gap width to overlap at the seam. | |
211 | Case | Electrical connections are made between the shield and the box at intervals of 20 mm (0.8 inches) by welding, fasteners, etc. | |
212 | Case | Bridge the gap with a gasket, eliminate the slot and provide a conductive path between the gaps. | |
213 | Case | Avoid straight corners and excessively large bends in shielding materials. | |
214 | Case | Aperture ≤20mm and slot length ≤20mm. Under the same opening area conditions, it is preferred to open holes rather than slots. | |
215 | Case | If possible, use several small openings instead of one large one, with as much spacing as possible between them. | |
216 | Case | For grounded equipment, connect the shield to chassis ground where the connector enters; for ungrounded (double-isolated) equipment, connect the shield to the circuit common ground near the switch. | |
217 | Chassis | Place the cable entry point as close to the center of the panel as possible, rather than near an edge or corner. | |
218 | Chassis | Align the slots in the shield parallel to the direction of ESD current flow, rather than perpendicular to it. | |
219 | Case | Use a sheet metal with metal brackets at the mounting holes to provide additional grounding points, or use plastic brackets for insulation and isolation. | |
220 | Case | Install local shielding devices at the control panel and keyboard locations on the plastic chassis to prevent ESD: | |
221 | Case | The location of the power connector and the connector leading to the outside should be connected to the chassis ground or circuit common ground. | |
222 | Enclosure | Use polyester film/copper or polyester film/aluminum laminates in plastics, or use conductive coatings or conductive fillers. | |
223 | Enclosure | Use a thin conductive chromate or chromate coating on aluminum, but do not use anodizing. | |
224 | Case | Use conductive filler material in plastics. Note that cast parts often have resin on the surface, making it difficult to achieve a low resistance connection. | |
225 | Case | Use a thin conductive chromate coating on steel. | |
226 | Chassis | Make clean metal surfaces contact directly instead of relying on screws to connect metal parts. | |
227 | Chassis | Connect the display to the chassis shield with a shield coating (Indium Tin Oxide, Indium Oxide, Tin Oxide, etc.) along the entire periphery. | |
228 | Case | Provide an antistatic (weakly conductive) path to ground at locations that are frequently touched by the operator, such as the space bar on the keyboard. | |
229 | Case | Make it difficult for the operator to arc to the edge or corner of the metal plate. Arc discharge to these points will cause more indirect ESD effects than arc discharge to the center of the metal plate. | |
230 | Others | Shielding protection guidelines for display windows: 1 Install shielding protection windows; 2 The external circuit part is connected to the circuit inside the machine through a filter device. | |
231 | Others | Key window protection criteria: | |
232 | Device selection | Capacitors should be chip capacitors with small lead inductance. | |
233 | Device selection | Stable power supply bypass capacitor, choose electrolytic capacitor | |
234 | Device selection | AC coupling and charge storage capacitors choose polytetrafluoroethylene capacitors or other polyester (polypropylene, polystyrene, etc.) capacitors. | |
235 | Device selection | Monolithic ceramic capacitors for high-frequency circuit decoupling | |
236 | Device selection | The criteria for capacitor selection are: | |
237 | Device Selection | Aluminum electrolytic capacitors should be avoided in the following situations: | |
238 | Device selection | Filter connectors are only necessary on shielded chassis | |
239 | Device selection | When selecting filter connectors, in addition to the factors to be considered when selecting ordinary connectors, the cutoff frequency of the filter should also be considered. When the frequencies of the signals transmitted on the cores of the connector are different, the cutoff frequency should be determined based on the signal with the highest frequency. | |
240 | Device selection | Surface mount packaging is recommended as much as possible | |
241 | Device selection | Carbon film is the first choice for resistor selection, followed by metal film. When wire winding is required for power reasons, its inductance effect must be considered | |
242 | Device selection | When selecting capacitors, it should be noted that aluminum electrolytic capacitors and tantalum electrolytic capacitors are suitable for low-frequency terminals; ceramic capacitors are suitable for medium-frequency range (from KHz to MHz); ceramic and mica capacitors are suitable for very high frequency and microwave circuits; try to use low ESR (equivalent series resistance) capacitors | |
243 | Device Selection | Bypass capacitors should be electrolytic capacitors, with a capacitance of 10-470PF, mainly depending on the transient current demand on the PCB board | |
244 | Device Selection | Decoupling capacitors should be ceramic capacitors, with a capacitance of 1/100 or 1/1000 of the bypass capacitor. Depends on the rise time and fall time of the fastest signal. For example, 10nF for 100MHz, 4.7-100nF for 33MHz, and an ESR value of less than 1 ohm | |
245 | Device selection | When selecting inductors, closed loop is better than open loop, and when open loop, winding type is better than rod type or solenoid type. Choose ferromagnetic core for low frequency, and choose ferrite core for high frequency | |
246 | Device selection | Ferrite beads, high frequency attenuation 10dB | |
247 | Device selection | Ferrite clamps MHz frequency range common mode (CM), differential mode (DM) attenuation up to 10-20dB | |
248 | Device selection | Diode selection: | |
249 | Device Selection | Integrated Circuits: | |
250 | Device selection | The rated current value of the filter is 1.5 times the actual working current value. | |
251 | Device selection | Selection of power supply filter: According to theoretical calculation or test results, the insertion loss value that the power supply filter should reach is IL. When actually selecting, a power supply filter with an insertion loss of IL+20dB should be selected. | |
252 | Device selection | AC filters and tributary filters cannot be used interchangeably in actual products. In temporary prototypes, AC filters can be used to temporarily replace DC filters; however, DC filters must not be used in AC situations. The filter cutoff frequency of the DC filter to ground capacitance is low, and AC current will produce large losses on it. | |
253 | Device selection | Avoid using electrostatic sensitive devices. The electrostatic sensitivity of the selected device is generally not less than 2000V. Otherwise, carefully consider and design anti-static methods. In terms of structure, it is necessary to achieve a good ground connection and take necessary insulation or shielding measures to improve the anti-static ability of the whole machine. | |
254 | Device selection | For a shielded twisted pair, the signal current flows on the two inner conductors and the noise current flows in the shielding layer, thus eliminating the coupling of the common impedance, and any interference will be sensed on the two conductors at the same time, causing the noise to cancel each other. | |
255 | Device selection | Unshielded twisted pair cables have a poorer ability to resist electrostatic coupling. However, they still have a good effect in preventing magnetic field induction. The shielding effect of unshielded twisted pair cables is proportional to the number of twists per unit length of the wire. | |
256 | Device selection | Coaxial cable has a more uniform characteristic impedance and lower loss, which makes it have better characteristics from DC to VHF. | |
257 | Device selection | Do not use high-speed logic circuits where they can be avoided | |
258 | Device selection | When selecting logic devices, try to select devices with a rise time longer than 5ns, and do not select logic devices that are faster than the timing required by the circuit | |
259 | System | When multiple devices are connected as an electrical system, in order to eliminate the interference caused by the ground loop power supply, isolation transformers, neutralization transformers, optocouplers and differential amplifier common mode inputs are used for isolation. | |
260 | System | Identify interference devices and interference circuits: In the start-stop or running state, devices or circuits with large voltage change rate dV/dt and current change rate di/dt are interference devices or interference circuits. | |
261 | System | Place a grounded conductive layer between the membrane keyboard circuit and the adjacent circuit opposite to it. | |
262 | Cables and connectors | PCB wiring and layout isolation criteria: strong and weak current isolation, large and small voltage isolation, high and low frequency isolation, input and output isolation, digital analog isolation, input and output isolation, the boundary standard is one order of magnitude difference. Isolation methods include: shielding, one or all independent shields, spatial separation, and ground separation. | |
263 | Cables and connectors | Unshielded ribbon cable. The best wiring method is to alternate the signal and ground wires. The inferior method is to use one ground wire, two signal wires, and then one ground wire, and so on, or use a dedicated grounding plate | |
264 | Cables and connectors | Signal cable shielding guidelines: 1 Use twisted pair or dedicated outer shielded twisted pair for strong interference signal transmission. 2 Shielded wires should be used for DC power lines; 3 Twisted wires should be used for AC power lines; 4 All signal lines/power lines entering the shielding area must be filtered. 5 Both ends of all shielded wires (sheaths) should have good contact with the ground. As long as no harmful grounding loop is generated, all cable shields should be grounded at both ends. For very long cables, there should also be a grounding point in the middle. 6 In sensitive low-level circuits, in order to eliminate possible interference in the ground loop, each circuit should have its own isolated and shielded ground wire. | |
265 | Cables and connectors | Shielded wire close to the metal bottom plate principle: All shielded cables should be placed close to the metal plate to prevent the magnetic field from passing through the loop formed by the metal floor and the shielding wire sheath | |
266 | Cables and connectors | Printed circuit plugs should also be equipped with more zero-volt wires as line isolation | |
267 | Cables and connectors | The best way to reduce the loop area of interference and sensitive circuits is to use twisted pair and shielded wires | |
268 | Cables and connectors | Twisted pair is very effective at less than 100KHz, and is limited at high frequencies due to uneven characteristic impedance and the resulting waveform reflection | |
